Overview:
| CPU | 8BC |
| Data | 8 bits |
| Memory | 8 bits |
| Architecture | Von Neumann |
| Technology | TTL |
| Status | Designed, Never built |
| Successor | 8BP2 |
| Time Period | ~August 2015 |
Problems:
This was the first real computer that I designed. The specifications were chosen to make design and construction easier: 8-bit data, 8-bit address, and 8 instructions. There were previous attempts to make a CPU, but since I was looking at it only from the perspective of instruction design, those attempts were unsuccessful. In this one, I started looking at it from the perspective of a system with subsystems that interconnected to form a CPU. Breaking down the problem like this was what made it possible for me to make the 8-Bit Computer (8BC).
Some notable facts about this computer are that there is no concept of flags, and the control unit was made using random logic.
Instruction Set:
| Opcode | Operands | Function |
|---|---|---|
| 0 | A, B, C or A, B | ALU operation where Cn in is 0. f(A, B) -> C or f(A) -> B. Two or three operands depending upon the operation chosen. |
| 1 | A, B, C or A, B | ALU operation where Cn in is 1. f(A, B) -> C or f(A) -> B. Two or three operands depending upon the operation chosen. |
| 2 | A | Read from input port 1 and store in memory[A]. |
| 3 | A | Read from input port 2 and store in memory[A]. |
| 4 | A | Read from memory[A] and ouput to port 3. |
| 5 | A | Read from memory[A] and ouput to port 4. |
| 6 | J | Jump to memory[J]. |
| 7 | A, B, J | If memory[A] == memory[B], then jump to memory[J]. Cn = 1 |
First instruction word:
| 3'opcode | ALU M | 4'ALU select |
The ALU control signals are directly connected to a 74181 ALU. The chip datasheet is required for programming this computer.
All operands are a single byte that follows the first word in the order specified.
Files:
Do not attempt to recreate. There are so many design flaws that there is no point.
I recommend the EAGLE schematic and not the PDF version.Updated 6/29/2019